Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group > ASICS Engineering
General Summary:
This individual leads, plans, PD implementation of ambiguous or conflicting requirements and performs the complex responsibility of the use of tools/applications (i.e., Cadence Innovus, Synopsis PTSI, etc.) to execute advanced architecture and implementation of design in the physical design environment of multiple complex blocks and makes suggestions for design improvements with respect to timing, power analysis and physical verification. Develops an implementation strategy that meets system requirements and customer needs for team. Effectively utilizes advanced problem solving and ASIC engineering practices to resolve complex implementation challenges, design, or verification problems. Owns the design and verification strategies of ASICs, and IP cores, reviews the strategies of more junior team members, and develops strategies for multiple IP’s. Reviews complex IP execution results from more junior team members and completes own runs through the complete flow to ensure that challenges/violations are fully understood and analyzed. Develop and implement IP’s using state-of-the-art tools (from Cadence, Synopsys, etc.) and deep sub-micron technology nodes(4nm, 3nm). Work with digital designer to understand and debug timing specifications, facilitate logic changes to improve clock frequency. Optimize the clock latencies for major clocks to reduce the design ECO cycle time. Deep analysis of clock and data path timing to identify key issues. Runs advanced power checks on multiple blocks to ensure design specifications are met; makes recommendations to leadership when specifications are not met. Interprets the results of highly complex performance checks and reports them to team lead. Stays up to date on technical literature and technological advances and suggests areas for innovation. Writes, reviews, and edits own technical document in accordance with template and reviews and provides feedback on more junior engineers' documentation. Maintains regular communication with key team members to ensure continued alignment between team deliverables and product execution plan. Writes technical documentation and provides technical expertise for design or project reviews and project meetings to ensure team's best interest is represented. Acts as a tech lead on small to large projects and owns team deliverables of the project. Continually evaluates process used in team to facilitate effective work-flow for possible improvement. Act as a strong contributor at design reviews and project meetings and communicates and implements a development plan.
Will accept a Master's Degree (or foreign academic equivalent) in Electrical Engineering, Computer Engineering, Computer Science or related degree field and two (2) years of experience in a related occupation. Will also accept a Bachelor's Degree (or foreign academic equivalent) in Electrical Engineering, Computer Engineering, Computer Science or related degree field and six (6) years of progressive experience in a related occupation. Employer will accept any suitable combination of education, training or experience.
*Telecommuting may be permitted. When not telecommuting, must report to Qualcomm’s office location(s) in San Diego, CA.*
Pay Range: $166,941.00 - $210,000.00
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