Sr. DSP and Wireless Systems Engineer, Digital RF Systems
Amazon.com
Job summary
Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.
Come work at Amazon!
The Role:
As a Sr. DSP and Wireless Systems Engineer working in the Digital RF Systems team, you will be responsible for DSP architecture definition, design and simulation of DSP blocks in wireless communication SOCs that are used in Kuiper phased array systems. You will be implementing end-to-end system models including fixed point DSP blocks, RF impairments of the radio, phased array antenna and satellite channel. You will be involved in novel techniques to estimate and correct RF impairments that will be implemented in HW and FW. Based on the system level constraints such as low power and cost, you will develop optimized solutions to support high throughput for our customers.
As a Sr. DSP Engineer, you will engage with an experienced cross-disciplinary staff to conceive and design innovative product solutions. You will work closely with internal inter-disciplinary teams such as ASIC/RFIC designers, FW/SW engineers, design verification engineers. You will drive key aspects of the silicon design as well as the entire RF line-up. You will support validation of the silicon in the lab and optimize RF performance via algorithms.
In this role you will:
· Design and model DSP algorithms such as beamforming, MIMO, DPD, CFR, digital cancellation schemes and RF impairment compensation
· Model RF transceivers impairments and develop RF impairment compensation algorithms
. Collaborate with RTL/RFIC designers, communication systems and software engineers to drive chip and system specifications
. Develop and optimize HW/SW calibration algorithms for RF SOC and phased array systems
. Architect HW and FW partitioning of calibration algorithms
. Develop detailed test plans and test procedures for pre-silicon, help with design verification as well as post silicon validation, integration and characterization of RF Wireless SOC performance
. Involve in chip bring-up in the lab and optimize conducted and/or OTA throughput performances by collaboratively working with cross functional teams
Export Control Requirement:
Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.
Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.
Come work at Amazon!
The Role:
As a Sr. DSP and Wireless Systems Engineer working in the Digital RF Systems team, you will be responsible for DSP architecture definition, design and simulation of DSP blocks in wireless communication SOCs that are used in Kuiper phased array systems. You will be implementing end-to-end system models including fixed point DSP blocks, RF impairments of the radio, phased array antenna and satellite channel. You will be involved in novel techniques to estimate and correct RF impairments that will be implemented in HW and FW. Based on the system level constraints such as low power and cost, you will develop optimized solutions to support high throughput for our customers.
As a Sr. DSP Engineer, you will engage with an experienced cross-disciplinary staff to conceive and design innovative product solutions. You will work closely with internal inter-disciplinary teams such as ASIC/RFIC designers, FW/SW engineers, design verification engineers. You will drive key aspects of the silicon design as well as the entire RF line-up. You will support validation of the silicon in the lab and optimize RF performance via algorithms.
In this role you will:
· Design and model DSP algorithms such as beamforming, MIMO, DPD, CFR, digital cancellation schemes and RF impairment compensation
· Model RF transceivers impairments and develop RF impairment compensation algorithms
. Collaborate with RTL/RFIC designers, communication systems and software engineers to drive chip and system specifications
. Develop and optimize HW/SW calibration algorithms for RF SOC and phased array systems
. Architect HW and FW partitioning of calibration algorithms
. Develop detailed test plans and test procedures for pre-silicon, help with design verification as well as post silicon validation, integration and characterization of RF Wireless SOC performance
. Involve in chip bring-up in the lab and optimize conducted and/or OTA throughput performances by collaboratively working with cross functional teams
Export Control Requirement:
Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.
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