The Northrop Grumman Microelectronics Center (NGMC) of Northrop Grumman Mission Systems has an opening for a Microelectronics Layout Engineer to join our team of qualified, diverse individuals at our Space Park Foundry (SPF) location in Redondo Beach, CA.
SPF is where we design, manufacture, and test semiconductor products for internal and commercial production customers as well as emerging technology programs. The SPF semiconductor foundry has unique capabilities supporting a range of production microelectronics technologies (Gallium Arsenide, Indium Phosphide, and Gallium Nitride). SPF provides leading edge technology development in semiconductor materials, processes, devices, and 3D heterogeneous integration (3DHI). SPF’s discriminating technological capabilities enable many of Northrop Grumman’s ground, avionic, and space systems.
The selected candidate will support the research and development of advanced microelectronics products for the Northrop Grumman Microelectronics Center. Candidate will be primarily responsible for lithography mask layout using computer aided design (CAD) with Cadence Virtuoso. Other responsibilities will include assisting in design and development of circuits used in a variety of semiconductor devices and utilizing a variety of advanced integration schemes. The candidate should be comfortable with computer programming and task automation.
The selected candidate should thrive in a fast-paced work environment with high expectations, significantly diverse assignments, collaborative/team settings across all levels. Candidate should be proactive in learning and problem solving as part of a team, collaborating closely with product engineers, process engineers, circuit designers, and test engineers.
Basic Qualifications for Senior Principal Engineer Microelectronic Semiconductors:
Bachelor’s degree in Electrical Engineering or any related STEM degree with 8 years of semiconductor foundry/design experience (Masters w/ 6 years exp or PhD w/ 4 years exp)Experience with Cadence VirtuosoExperience performing multiple mask layoutsExperience with the software AWR and/or ADSUS citizenship requiredPreferred Qualifications for Senior Principal Engineer Microelectronic Semiconductors:
Experience with semiconductor fabrication processes, preferably III-V semiconductorsExcellent communication, interpersonal skills, and the ability to interface with all levels of employees and managementSalary Range: $137,400.00 - $206,000.00The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.