Minimum qualifications: + Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. + 3 years of experience with low power RTL and physical design techniques. + Experience with scripting languages (e.g., Python, Perl). Preferred qualifications: + Master’s degree/PhD in Electrical Engineering, Computer Engineering, or Computer Science, emphasizing on computer architecture. + 3 years of experience in ARM ISA, PPA, design and microarchitecture. + 1 year of experience in CPU applications for mobile and wearable products. + Experience on advanced CPU techniques such as AI engines, branch predictors, IFU, LSU and advanced prefetching algorithms. Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. As a Silicon Engineer, you will be the key contributor to the CPU subsystem architecture and microarchitecture definitions. You will collaborate with system performance and software teams to plan and conduct workload performance analysis, debug performance bottlenecks and project performance at various design phases. Leveraging your CPU-specific knowledge and expertise, you will be working with engineers in power, thermal, security, physical design and other subsystem teams on the CPU subsystem configuration, architecture and microarchitecture features, and PPA (Performance, Power, Area) trade-off analysis. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. + Define various architectural aspects of CPU subsystem including but not limited to, active and idle power control, fabric structure, debug, analytics and other sub system components. + Participate in Performance, Power, Area (PPA) trade-off analysis for architecture and microarchitecture features. Communicate analysis results in both qualitative and quantitative fashion to support major decisions. + Assess performance analysis infrastructure, which includes preparing workloads, developing performance models, and conducting performance and workload analysis. + Define next generation low power schemes. + Define future roadmap features and performance requirements. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCP_EEO_Post.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.