Job Requirements
Expertise in Low Power Synthesis with MCMM Aware and Logical/Physical Aware SynthesisStrong knowledge and expertise in Low Power Designs, UPF/CPF Terminologies and FundamentalsExperience with advanced low power design techniques.Experience with advanced technology nodes like 2nm, 3nm, 4nm.Collaborate with RTL and verification teams to ensure design requirements and power goals are met from synthesis through final signoff.Ensure proper power intent using UPF/CPF, ensuring low power design techniques (e.g., power gating, clock gating, voltage scaling) are implemented across the flow.Proven experience in physical design, with in-depth knowledge of synthesis, floorplan, placement, clock tree synthesis, routing, and signoff (Static Timing Analysis, Formal Verification, Power Signoff, Physical Verification)Knowledge of high-performance digital designs and custom ASIC flows.Strong problem-solving skills and ability to analyze complex design challenges.Excellent communication skills and ability to collaborate in a fast-paced, cross-functional team environment.

Work Experience

 2nm, 3nm, 4nm.

synthesis, floorplan, placement, clock tree synthesis, routing, and signoff

Lower power UPF/CPF