In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise​

Join Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we’ve united two industry leaders to create an optical networking powerhouse—combining cutting-edge technology with proven leadership to redefine the future of connectivity.​

Infinera is now part of the Nokia Corporation and its subsidiaries. When you apply, the information you share will be handled with care and used only for recruitment purposes within the group. 

BS EE/physics with 10+ years industrial experience Analog wafer level IC testing Must have experience with probe card cleaning, maintenance and debug Must have experience with ATE platform and wafer prober operation, maintenance and support in production Must be able to assemble coherent and concise reports summarizing status and next steps Must be able to effectively present findings to a cross-functional, collaborative team environment Prefer experience with Galaxy or JMP data analysis tools. Prefer Advantest 93k expertise including equipment calibration, TL/ISO compliance and ESD compliance Prefer expertise with Perl, VB, SQL and Perforce Prefer UNIX/Linux experience

 

Skills Required:

 

Proficient interacting with design engineers Strong debug and analytical skills Self motivated team player Strong time and project management skills Detail oriented with all aspects of technical work and vendor interactions Excellent verbal and written communication skills Experienced with scheduling and planning projects with external vendors and customers Knowledge of automated test equipment (ATE) platforms, probe card development, software and hardware for wafer level testing. The candidate is expected to have hands on experience with production yield analysis and yield drop out debug and disposition. Familiar & comfortable with high-performance medium volume ASICs, production environment Ability to write status reports, schedules and project plans and present results in general meeting formats. Collection, analysis, correlation and interpretation of data using statistical techniques and industry standard tools is required Some experience with scripting and simple programming skills. Critical thinking skills to debug and solve problems required RF ATE Experience is a plus

 

Responsibilities:

 

Interface with external vendors for R&D and production Production yield tracking, milestone tracking, problem assessment/disposition and invoice tracking Wafer level ATE platform support of production, yield analysis, failure Paretos and yield improvement Production logistics including ASIC wafer tracking and travelers Supporting engineering releases through pilot runs and production Develop, debug and release production methods and procedures to improve efficiency and yield fully compliant to TL/ISO manufacturing standards