Job Requirements
RTL Coding: Develop and implement RTL code using Verilog or VHDL for digital circuit designs.Synthesis: Perform synthesis and ensure the design meets timing, area, and power requirements.Verification: Collaborate with verification engineers to validate the functionality of RTL designs using simulation tools.Debugging: Identify and resolve issues in RTL code and ensure the design is error-free.Documentation: Create and maintain design specifications and micro-architecture diagrams for various functional blocks.Optimization: Optimize RTL designs for performance, power, and area.

Qualifications:

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.2-5 years of experience in RTL design and verification.

Work Experience

Skills Required:

Proficiency in Verilog/VHDL: Strong command of hardware description languages.Digital Circuit Design: Solid understanding of digital circuit design principles.FPGA/ASIC Knowledge: Familiarity with FPGA and ASIC technologies and design methodologies.Simulation Tools: Experience with simulation and verification tools.Problem-Solving: Strong analytical and problem-solving skills.Team Collaboration: Ability to work effectively in a team environment.