Dallas, TX, 75219, USA
24 hours ago
Resolution Enhancement Techniques (RET) Process Development Engineer
**Change the world. Love your job.** A Process Development Engineer is responsible for the development, characterization and optimization of MEMS resonator devices to meet the requirements for volume production as part of the analog technology development team. The ideal candidate will be a technical leader in the area of resonators and oscillators driving the characterization and optimization of the device and process to insure robustness, reliability, and manufacturability meeting all electrical device performance targets. **Responsibilities include:** As a Resolution Enhancement Techniques (RET) Engineer, you'll architect new TI products and make our customers' visions a reality. You'll define, design, model, implement, and document analog, digital, and RF integrated circuits (ICs). Responsibilities will include, but are not limited to: + Partnering with design, process engineering and process integration teams to create test patterns for patterning process development/monitoring, photomask mask manufacturing support, and OPC model calibration and validation. + Layout work will span across all TI technology nodes, with current emphasis on 28nm and 20nm. + While emphasis is on layout, there will be opportunities for other lithography/OPC-related work depending on the experience and interests of this hire. + Partnering with design, process engineering and process integration teams to develop mutually agreeable design specifications for manufacturing processes for advanced analog nodes. + Developing/improving mask/lithography/etch processes for next node analog nodes through photolithographic simulation and on mask/wafer verification. + Data collection, simulation, calibration, and validation of optical proximity correction (OPC) models and recipes. + Partnering with internal/external fabs to transfer processes for advanced analog nodes. + Troubleshooting photolithographic patterning/alignment related issues for all fabs within TI. The person performing this role must be capable to plan effectively, drive schedules, meet critical deadlines on multiple tasks in parallel, lead technical discussions in their area of expertise, and work effectively across organizational boundaries. They must be able to clearly communicate project status and actions. Additionally, they must be able to interface with multiple organizations and work well on a diverse team to accomplish goals. **Why TI?** + Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics. + We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI (https://edbz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX/pages/4012) + Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us. **About Texas Instruments** Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, personal electronics, communications equipment and enterprise systems. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com . Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, disability, genetic information, national origin, gender, gender identity and expression, age, sexual orientation, marital status, veteran status, or any other characteristic protected by federal, state, or local laws. If you are interested in this position, please apply to this requisition. **Minimum requirements:** + Masters in Electrical Engineering, Physics, Computer Science, Chemistry or related degree + 5+ years experience in a semiconductor photolithography and/or OPC development role + Lithography & OPC expertise for 45nm, 28nm, 22nm, and 20nm processing nodes + Expertise in double patterning and test structure requirements to create/validate OPC solutions + Strong knowledge/understanding of advanced FEOL and/or BEOL lithography processes, lithography simulation techniques, mask making and OPC techniques used in semiconductor manufacturing and process development + Programming experience with any scripting language, particularly for the purpose of automating layout work and supporting subsequent metrology **Preferred qualifications:** + PhD in Electrical Engineering, Physics, Computer Science, Chemistry or related degree + FEOL lithography & OPC expertise for 45nm, 28nm, and 20nm processing nodes; FEOL integration a plus + Familiarity with physical layout (gds/oas). Knowledge of litho/OPC test pattern design and layout execution by creating/using test pattern generators for layout software platforms like Virtuoso, KLayout. + Understanding of OPC pattern validation methodologies and process window assessment techniques like KLA’s Process Window Qualification (PWQ) + FEOL integration knowledge/experience a plus + Demonstrated strong analytical and problem solving skills + Strong verbal and written communication skills + Ability to work in teams and collaborate effectively with people in different functions + Strong time management skills that enable on-time project delivery + Demonstrated ability to build strong, influential relationships + Ability to work effectively in a fast-paced and rapidly changing environment **ECL/GTC Required:** Yes
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