Company:Qualcomm Semiconductor LimitedJob Area:Engineering Group, Engineering Group > Hardware Engineering
General Summary:
We are seeking a highly motivated and technically skilled engineer to join our team in driving Design-for-Test (DFT) synergy and innovation. This role is pivotal in accelerating debug cycles, monitoring deliverables first-time-right KPI, and applying data analytics to structural test vector analysis. The ideal candidate will collaborate closely with DFT test and yield engineering teams to improve current methodologies and reduce overkill in structural testing.
Key Responsibilities:
Collaborate with DFT and diagnostic engineers to perform first-level debug of DFT vector issuesPartner with DFT engineers to streamline debug workflows and reduce cycle timeDrive quality vectors by partnering with DFT teams to improve first-time-right success rateExtract and analyze design information to support data-driven insights into structural test vector anomalies.Collaborate with data engineers to develop and apply analytics models to detect outliers and systemic issues in test results.Explore and prototype new methodologies to reduce structural test overkill.
Minimum Qualifications:
Bachelor’s or Master’s degree in Electrical/Electronics Engineering, Computer Engineering, or related field.2+ years of experience in DFT, SoC design, or test engineering.Strong understanding of scan, BIST, JTAG, and other DFT techniques.Experience with DFT EDA tools (e.g., Synopsys DFT Compiler, Tessent, or equivalent).Excellent problem-solving skills and ability to work cross-functionallyExcellent communication and teamwork skillsPreferred Qualifications:
Solid understanding of VLSI design and test principles, including scan insertion, ATPG, and fault modeling.Proficiency in scripting and programming languages such as Python, Perl, or TCL.Familiarity with design tool (e.g. PrimeTime, Tempus) or ATE platforms (e.g., Advantest 93K, Teradyne) and test program development is a plus.Analytical skills and experience with data analysis tools (e.g., JMP, Exensio, DataPower) is a plus.Minimum Qualifications:
• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
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