Company:Qualcomm Technologies, Inc.

Job Area:Engineering Group, Engineering Group > GPU ASICS Engineering

General Summary:

Physical implementation of industry leading integrated graphics core designs from netlist to GDS of very complex and high frequency blocks or top level. This includes floor-planning, placement, clock implementation and routing of very high gate count design to meet very aggressive Power, Performance and Area (PPA) targets. Involves working on latest technology process nodes and employing latest design techniques to push PPA envelope which includes working with RTL design teams to optimize design. Incumbent is also expected to be involved in collaboration with multi-disciplined teams and tool vendors to develop/enhance automation in flows and methodologies for design efficiency improvement. This role requires understanding of trade-offs to be made for PPA, hence decisions taken to get the optimal design.  

The ideal candidate will have/demonstrate the following:

Experience in Physical design which includes floor-planning, placement, clock implementation, routing for complex, high frequency designsExperience with physical synthesis and implementation tools - Synopsys Fusion Compiler, ICC2 and Cadence Genus/InnovusMust have good knowledge of static timing analysis, reliability and power analysisStrong understanding of CMOS circuit design and design techniques to push Power, Performance and Area of complex designsAbility to think outside the box for innovative solutions to improve power and eliminate performance bottlenecksStrong understanding of GPU micro-architecture and collaborate with RTL designers to improve bottlenecks for power and performanceSolid working knowledge of scripting skills including tcl, perl or pythonExcellent communication skills and collaborating in a team environment is a must

Preferred Skills:

Clock, power delivery network design, process technology, prior experience in flow and methodology development, block closureHands on experience with Synthesis, DFT, Place and Route, Timing and Reliability SignoffHands on experience working with very complex designs that push the envelope of Power, Performance and AreaHands on experience working with sub-micron technology process nodes eg. 5nm, 4nm and below is highly advantageousPrior experience in flow and methodology development is an advantageRTL expertise (Verilog/System Verilog)Excellent debug and analytical skillsAbility to work well in a collaborative environment with multi-disciplined teams

Minimum Qualifications:

Bachelor’s degree in Electrical/Computer Engineering10+ years of direct physical design work experienceStrong background in VLSI design, scriptingStrong background and experience working with industry standard Synthesis and Place and Route tools including Signoff toolsHands on experience taping out designs in sub-micron technology node design < 10nmExpect strong self-motivation and time management skills

Preferred Qualifications:

Master’s degree in Electrical/Computer Engineering8+ years of direct physical design work experienceIn depth end to end experience from RTL2GDS, taping out at least 6 complex designs in deep sub-micron technology node

Minimum Qualifications:

•    Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 6+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
OR
Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 5+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
OR
PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

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Pay range and Other Compensation & Benefits:

$195,200.00 - $292,800.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm.  We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus).  In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

If you would like more information about this role, please contact Qualcomm Careers.