1. Good fundamentals in analog and mixed signal circuit concepts and topologies.
2. Experience working with mixed signal verification environment, simulation, and regression tools such as Cadence Virutuoso, Spectre, xCelium, Incisive, vManager, IMC
3. Ability to read analog schematics and extract related main functionality.
4. Familiar with Verilog based RTL coding and ASIC design methodology.
5. Experience in System Verilog for advanced verification methodologies such as assertions, constrained randomization, metric driven, and UVM.
6. Familiar with behavioral modelling of analog blocks using System Verilog (RNM) and VerilogAMS.
7. Experience in modelling analog & mixed signal blocks.
8. Some knowledge of UNIX shell scripting, Perl, Python and TCL scripting.