We are seeking an experienced Digital Physical Design Lead to join our Motor drivers Digital design team. The ideal candidate will be responsible for leading physical design implementation of complex digital circuits from RTL to GDSII. **Why TI?** + Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics. + We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI (https://edbz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX/pages/4012) + Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us. **About Texas Instruments** Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, personal electronics, communications equipment and enterprise systems. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com . Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. If you are interested in this position, please apply to this requisition. Key Responsibilities: - Lead and mentor a team of physical design engineers - Drive full chip physical implementation including synthesis, floor planning, power planning, placement, clock tree synthesis, and routing - Develop and maintain physical design methodologies and flows - Perform timing closure, power analysis, IR drop sign-off activities - Interface with system architects, front-end design and verification teams to achieve optimum design closure - Provide technical guidance and review design work of team members - Participate in technical reviews and design planning meetings Preferred Skills: + Min 4 years' experience in the area of Digital Physical design. + Strong expertise with industry-standard EDA tools (Cadence preferred– enus, Innovus, Tempus, Voltus etc. ) + Experience with integration of complex Analog and Flash based IP designs, custom routing. + Experience working with RTL2GDS flows for digital implementation, optimization for PPA. + Knowledge of SDC constraint development and timing closure techniques + Understanding of DFT, low power design techniques, and clock domain crossing + Scripting skills in Tcl/Perl/Python + Familiar with ESD, IO ring creation, Reliability and Signoff checks. Understanding of signal integrity and power integrity concepts + Experience with formal ECO flows **ECL/GTC Required:** Yes