Applications are accepted until further notice. 

Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a Cisco representative may contact you directly if a relevant position opens.  

 

Meet the Team  

Acacia, now part of Cisco, provides innovative silicon-based high speed optical interconnect products to accelerate network scalability through advancements in performance, capacity, and cost. Our DSP ASICs, silicon photonic PICs and coherent modules empower cloud and service providers to meet the fast-growing demand for data. We have assembled a team of cross-functional experts capable of solving the challenges of next generation optical interconnects, resulting in industry-leading, award-winning products. Come join us at Cisco, named the #1 world’s best workplaces, and do purposeful work that makes a global impact and gives back to a company culture that empowers an inclusive future for all.   

 

Your Impact  

The ASIC Design Verification Co-Op Engineer will be a member of a team working on next generation 100G-1T coherent optical communications products. This role is focused on verifying highly-complex ASICs that are used in these next-generation telecom systems. The engineer in this role uses sophisticated verification techniques to complete advanced individual contributions to the projects. There are opportunities to develop process improvements for the team and to coordinate with other engineers within the engineering community to add value to the ASIC projects.  

This engineer must be a fast-learning, self-motivated effective person who is able to operate in a fast-paced, dynamic and highly technical environment. A successful candidate will be energetic, collaborative and passionate about learning how to deliver the most advanced high speed optical products in the world. Knowledge of object-oriented verification methodologies is required.  

 

Develop detailed and comprehensive test plans  Develop verification test benches  Timely execution of test plans  Assist with chip level design tradeoffs by working with design engineers  Participate in review of design verification coding and coverage metrics  Participate and assist in FPGA emulation efforts  Work collaboratively with team to develop & incorporate latest technologies & processes  

  

Minimum Qualifications  

Currently enrolled in a full-time graduate program  Knowledge of the latest ASIC verification methodologies, tools and scripting/programming languages  Knowledge of SystemVerilog/UVM, SystemC  Knowledge of C and/or C++  

 

Preferred Qualifications  

Knowledge of DSP algorithms and modulation techniques such as QAM  Lab silicon validation experience  Knowledge of Formal Verification methodologies and tools such as Jasper  Ability to work collaboratively across business groups  Excellent communication skills (verbal and written)  

Why Cisco?  

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Simply put – we power the future.  

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. 

We are Cisco, and our power starts with you.