**About the job you’re considering** We’re looking for a collaborative Physical Design Engineer to help drive the next generation of AMS (Analog Mixed Signal) chip development. In this role, you’ll contribute to the implementation of digital blocks at both the block and full-chip level, contributing to high-performance, low-power silicon solutions. You’ll join a supportive team that values diverse perspectives, technical excellence, and continuous innovation. **Your role** + Develop the physical design of digital blocks across block-level and full-chip AMS implementations using RTL-to-GDSII flows. + Execute core design tasks including synthesis, PNR, STA, EM/IR analysis, LEC, and low-power verification. + Drive early-stage planning through floorplan, power plan, congestion analysis, and hierarchical synthesis. + Enhance power, performance, and area (PPA) through RTL compilation and placement feedback. + Evaluate timing, area, congestion, and power reports to ensure robust, manufacturable designs. **Your skills and experience** + Bachelor’s degree or higher in Electrical Engineering or a related field, with 7 years of experience in physical design. + Strong understanding of physical design concepts and RTL-to-GDSII flows, including full-chip and block-level integration of digital and analog components. + Hands-on experience with TSMC or GF processes, particularly in the 55nm to 22nm range. + Expertise in low-power design techniques such as power gating, multiple voltage domains, and UPF-based flows. + Proficiency with Cadence Innovus for physical implementation and EDA tools like Primetime, Formality, or Conformal for verification and low power checks. + Solid knowledge of Verilog and scripting languages such as Tcl and Python. **Life at Capgemini** Capgemini supports all aspects of your well-being throughout the changing stages of your life and career. For eligible employees, we offer: + Flexible work + Healthcare including dental, vision, mental health, and well-being programs + Financial well-being programs such as 401(k) and Employee Share Ownership Plan + Paid time off and paid holidays + Paid parental leave + Family building benefits like adoption assistance, surrogacy, and cryopreservation + Social well-being benefits like subsidized back-up child/elder care and tutoring + Mentoring, coaching and learning programs + Employee Resource Groups + Disaster Relief About Capgemini Engineering World leader in engineering and R&D services, Capgemini Engineering combines its broad industry knowledge and cutting-edge technologies in digital and software to support the convergence of the physical and digital worlds. Coupled with the capabilities of the rest of the Group, it helps clients to accelerate their journey towards Intelligent Industry. Capgemini Engineering has 65,000 engineer and scientist team members in over 30 countries across sectors including Aeronautics, Space, Defense, Naval, Automotive, Rail, Infrastructure & Transportation, Energy, Utilities & Chemicals, Life Sciences, Communications, Semiconductor & Electronics, Industrial & Consumer, Software & Internet. Capgemini Engineering is an integral part of the Capgemini Group, a global business and technology transformation partner, helping organizations to accelerate their dual transition to a digital and sustainable world, while creating tangible impact for enterprises and society. It is a responsible and diverse group of 340,000 team members in more than 50 countries. With its strong over 55-year heritage, Capgemini is trusted by its clients to unlock the value of technology to address the entire breadth of their business needs. It delivers end-to-end services and solutions leveraging strengths from strategy and design to engineering, all fueled by its market leading capabilities in AI, generative AI, cloud and data, combined with its deep industry expertise and partner ecosystem. The Group reported 2024 global revenues of €22.1 billion. Get the future you want | www.capgemini.com Disclaimer Capgemini is an Equal Opportunity Employer encouraging diversity in the workplace. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status or any other characteristic protected by law. This is a general description of the Duties, Responsibilities and Qualifications required for this position. Physical, mental, sensory or environmental demands may be referenced in an attempt to communicate the manner in which this position traditionally is performed. Whenever necessary to provide individuals with disabilities an equal employment opportunity, Capgemini will consider reasonable accommodations that might involve varying job requirements and/or changing the way this job is performed, provided that such accommodations do not pose an undue hardship. Capgemini is committed to providing reasonable accommodations during our recruitment process. If you need assistance or accommodation, please reach out to your recruiting contact. Please be aware that Capgemini may capture your image (video or screenshot) during the interview process and that image may be used for verification, including during the hiring and onboarding process. Click the following link for more information on your rights as an Applicant http://www.capgemini.com/resources/equal-employment-opportunity-is-the-law Applicants for employment in the US must have valid work authorization that does not now and/or will not in the future require sponsorship of a visa for employment authorization in the US by Capgemini. \#LI-JE1 **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _AMS PD Engineer_ **Location:** _CA-Sunnyvale_ **Requisition ID:** _081361_